EVAL-CN0506-FMCZ

Circuit Note CN-0506 Devices Connected/Referenced Circuits from the Lab® reference designs are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0506. ADIN1300 Robust, Industrial, Low Latency and Low Power 10 Mbps, 100 Mbps, and 1 Gbps Ethernet PHY LT350...
развернуть ▼ свернуть ▲
 
 

Технические характеристики

показать свернуть
Тип отладочного средства
Применение
Нашли ошибку? Выделите её курсором и нажмите CTRL + ENTER

Файлы 1

показать свернуть
Circuit Note CN-0506 Devices Connected/Referenced Circuits from the Lab® reference designs are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0506. ADIN1300 Robust, Industrial, Low Latency and Low Power 10 Mbps, 100 Mbps, and 1 Gbps Ethernet PHY LT3502 1.1 MHz, 500 mA Step-Down Regulator LTC4316 Single I2C/SMBus Address Translator 10 Mbps/100 Mbps/1000 Mbps Dual Channel, Low Power Industrial Ethernet PHY EVALUATION AND DESIGN SUPPORT Circuit Evaluation Boards CN-0506 Circuit Evaluation Board (EVAL-CN0506-FMCZ) Design and Integration Files Schematics, Layout Files, Bill of Materials CIRCUIT FUNCTION AND BENEFITS The circuit shown in Figure 1 is a dual channel, low latency, low power Ethernet physical layer (PHY) card that supports 10 Mbps, 100 Mbps, and 1000 Mbps speeds for industrial Ethernet applications using line and ring network topoligies. Dual channels enable line and ring network topologies that are commonly used for industrial sensing, control, and distributed control systems. The ADIN1300 Ethernet PHY was extensively tested for electromagnetic compatibility (EMC) and electrostatic discharge (ESD) robustness and supports automatic negotiation to enable linking with remote PHY devices at the highest common speed advertised. IEEE 1588 time stamping in the PHY reduces timing uncertainty in real-time applications and enhances link loss detection for redundant and real-time applications. The circuit consists of two indivudual, independent 10 Mbps, 100 Mbps, and 1000 Mbps PHYs, each with an energy efficient Ethernet (EEE) PHY core with all the associated common analog circuitry, input and output clock buffering, management interface, subsystem registers, media access control (MAC) interface, and control logic. The design is powered from the host field programmable gate array (FPGA) mezzanine card (FMC) development board, eliminating the need for an external power supply. A software programmable clock enables media independent interface (MII), reduced MII (RMII), and reduced Gigabit MII (RGMII) MAC interface modes. RJ45 ports with integrated magnetics keep the solution as compact as possible. The solution supports cable lengths up to 150 meters at gigabit speeds and up to 180 meters at 100 Mbps or 10 Mbps. This solution is typically used in ring or bus topologies. The automatic negotiation feature of the ADIN1300 allows connection with other PHY devices at the highest supported speed. Rev. 0 Circuits from the Lab® reference designs from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due toanycausewhatsoeverconnectedtotheuseofanyCircuitsfromtheLabcircuits. (Continuedonlastpage) One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2020 Analog Devices, Inc. All rights reserved. PDF
Документация на EVAL-CN0506-FMCZ 

CN0506 (Rev. 0) 10 Mbps/100 Mbps/1000 Mbps Dual Channel, Low Power Industrial Ethernet PHY

Дата модификации: 06.10.2021

Размер: 330.1 Кб

7 стр.

    Публикации 1

    показать свернуть
    09 сентября
    статья

    ИС физического уровня 10/100/1000 Мбит/с промышленного двухканального Ethernet с низким энергопотреблением

    Микросхема физического уровня Ethernet с двумя каналами ADIN1300 производства Analog Devices идеальна для организации на производстве мониторинга, контроля и построения распределенных систем управления. Статья посвящена тестированию отладочной... ...читать

    Внимание! Точность указанного на сайте описания товара не может быть гарантирована. Для получения более полной и точной информации о товаре смотрите техническое описание (Datasheet) на сайте производителя.