MC100EP91MNR2G

Преобразователь логического уровня - [24-QFN (4x4)]; Линий: 3; Каналов: 3; В канале: 1; Вход: LVDS; Выход: NECL; Ucc A: 2.375...3.8 В
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Технические характеристики

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Корпус QFN-24
Количество линий
Количество каналов
Количество линий в канале
Тип входного сигнала
Тип выходного сигнала
Напряжение питания входа
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MC100EP91 2.5 V/3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL Output Translator http://onsemi.com Description The MC100EP91 is a triple any level positive input to NECL output translator. The device accepts LVPECL, LVTTL, LVCMOS, HSTL, CML or LVDS signals, and translates them to differential NECL output signals (−3.0 V / −5.5 V). To accomplish the level translation the EP91 requires three power rails. The VCC pins should be connected to the positive power supply, and the VEE pin should be connected to the negative power supply. The GND pins are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.01 mF capacitors. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled to GND. These conditions will force the Q outputs to a low state, and Q outputs to a high state, which will ensure stability. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Features • • • • • • Maximum Input Clock Frequency > 2.0 GHz Typical Maximum Input Data Rate > 2.0 Gb/s Typical 500 ps Typical Propagation Delay Operating Range: VCC = 2.375 V to 3.8 V; VEE = −3.0 V to −5.5 V; GND = 0 V Q Output will Default LOW with Inputs Open or at GND Pb−Free Packages are Available* MARKING DIAGRAMS* 20 20 MC100EP91 AWLYYWWG 1 SO−20 WB DW SUFFIX CASE 751D 1 24 1 24 1 24 PIN QFN MN SUFFIX CASE 485L A WL, L YY, Y WW, W G or G 100 EP91 ALYWG G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2011 October, 2011 − Rev. 5 1 Publication Order Number: MC100EP91/D PDF
Документация на серию MC100EP91 

MC100EP91 - Any Level Positive Input to NECL Output Translator The MC100EP91 is a triple any level positive input to NECL output

Дата модификации: 28.10.2011

Размер: 136.3 Кб

10 стр.

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