VS1011E-L

VLSI SOLUTION OY
MPEG1&2, MP3, WAV и PCM декодер. Содержит стерео-ЦАП, УНЧ, экономичный микропроцессор с DSP-ядром, 5,5КБ ОЗУ. Поддерживает VBR
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Технические характеристики

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Корпус LQFP-48
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VS1011e VS1011e - MP3 AUDIO DECODER Features Description • Decodes MPEG 1.0 & 2.0 audio layer III (MP3: CBR, VBR, ABR); layers I & II (MP1, MP2) optional; WAV (PCM + IMA ADPCM) • 320 kbit/s MP3 with 12.0 MHz external clock • Streaming support for all audio formats • Bass and treble controls • Operates with single 12..13 MHz or 24..26 MHz external clock • Internal clock doubler • Low-power operation • High-quality stereo DAC with no phase error between channels • Stereo earphone driver capable of driving a 30Ω load • Separate 2.5 .. 3.6 V operating voltages for analog and digital • Serial control and data interfaces • Can be used as a slave co-processor • 5.5 KiB On-chip RAM for user code / data • SPI boot for standalone applications • New functions may be added with software and 4 GPIO pins • Lead-free and RoHS-compliant packages LPQFP-48, BGA-49, and SOIC-28 VS1011 GPIO GPIO VS1011e is a single-chip MPEG audio (MP3) decoder IC. The circuit contains a high-performance, low-power DSP processor core VS_DSP4 , working memory, 5 KiB instruction RAM and 0.5 KiB data RAM for user applications, serial control and input data interfaces, 4 general purpose I/O pins, as well as a high-quality variablesample-rate stereo DAC, followed by an earphone amplifier and a common buffer. VS1011e receives its input bitstream through a serial input bus, which it listens to as a system slave. The input stream is decoded and passed through a digital volume control to an 18-bit oversampling, multi-bit, sigmadelta DAC. The decoding is controlled via a serial control bus. In addition to basic decoding, it is possible to add application specific features, like DSP effects, to the user RAM memory. VS1011e can boot directly from SPI EEPROM to run standalone applications without a separate microcontroller. Stereo DAC 4 Stereo Ear− phone Driver audio L R output X ROM DREQ SO SI SCLK XCS Serial Data/ Control Interface 4 X RAM VSDSP Y ROM XDCS Y RAM Instruction RAM Version: 1.22, 2014-12-19 Instruction ROM 1 PDF
Документация на серию VS1011E 

VS1011 Datasheet VS1011

Дата модификации: 19.12.2014

Размер: 661.7 Кб

48 стр.

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