Серия аналогово цифровых преобразователей (АЦП) 3PA1030

Общие характеристики

	Раздел	Аналогово Цифровые Преобразователи (АЦП)
	Корпус	TSSOP-28
	Разрядность АЦП
	Кол-во измерительных каналов
	Частота преобразования
	Уровень сигнал/шум
	Конфигурация источника опорного напряжения
	Напряжение внутреннего ИОН
	Диапазон питающих напряжений аналоговой части
	Диапазон питающих напряжений цифровой части
	Диапазон рабочих температур

Документация на серию 3PA1030

3PA1030 Complete 10-Bit, 50MSPS, CMOS Analog-to-Digital Converter FEATURES PRODUCT DESCRIPTION          CMOS 10-Bit, 50 MSPS Sampling A/D Converter Configurable Input: Single-Ended or Differential Differential Nonlinearity: 0.3 LSB Three State Outputs Out of Range Indicator Built In Clamp Function (DC Restore) Adjustable On Chip Voltage Reference IF Under sampling to 135 MHz Power Dissipation: 84 mW (3 V Supply)  Power Down (Sleep) Mode: 10 W Operation Between +2.7 V and +5.5V Supply Green, 28-Lead TSSOP Package Pin Compatible with THS1030, AD9200 and AD876 Family    PRODUCT HIGHLIGHTS  Low Power: The 3PA1030 speed is 50MSPS but only consumes 84 mW on a 3 V supply. In sleep mode, power is reduced to 10 W. The 3PA1030 is a monolithic, single supply, 10-Bit, 50 MSPS analog-to-digital converter with an on-chip sample-and-hold amplifier and voltage reference. The 3PA1030 uses multi-stage differential pipeline architecture at 50 MSPS data rates and guarantees no missing codes over the full operating temperature range. The input of the 3PA1030 has been designed to ease the development of both imaging and communications systems. The user can select a variety of input ranges and offsets and can drive the input either single-ended or differentially. The sample and hold (SHA) amplifier is equally suited for both multiplexed systems that switch full-scale voltage levels in successive channels and sampling single channel inputs at frequencies up to and beyond the Nyquist rate. AC coupled input signals can be shifted to a predetermined level, with an on-board 3PEAK proprietary clamp circuit. The dynamic performance is excellent. The 3PA1030 has an onboard programmable reference. An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the application.  Pin Compatible with THS1030/TLC876/AD9200/AD876: The 3PA1030 allows older designs to migrate to higher speed and lower supply voltages. A single clock input is used to control all internal conversion cycles. The digital output data is presented in straight binary output format. An out-of-range (OTR) signal indicates an overflow condition which can be used with the most significant bit to determine low or high overflow.  100 MHz On-board Sample-and-Hold: The versatile SHA input can be configured for either single ended or differential inputs. The 3PA1030 can operate with a supply ranging from +2.7 V to +5.5 V, ideally suiting it for low power operation in high speed applications.  Out-of-Range Indicator: The OTR output bit indicates when the input signal is beyond the 3PA1030’s input range. The 3PA1030 is specified over the industrial (–40°C to +85°C) temperature range.  Built-In Clamp Function: Allows dc restoration of video signals. Figure 1. Functional Block Diagram REV-1.2 www.3peakic.com.cn -1-  PDF

Документация на серию 3PA1030 

Microsoft Word - PM009_3PA1030_Datasheet_Rev.1.2

Дата модификации: 14.08.2022

Размер: 2.21 Мб

17 стр.

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