Серия линейных регуляторов TPL910

Общие характеристики

	Раздел	Линейные регуляторы
	Корпус	DFN30308
	Тип регулятора
	Входное напряжение
	Выходное напряжение
	Внешняя регулировка выходного напряжения
	Максимальный выходной ток
	Погрешность установки выходного напряжения
	Допустимое падение напряжения вход-выход
	Рабочая температура

Документация на серию TPL910

TPL910 Series 1-A Output, High-PSRR, Low-Noise LDO Regulator Features Description ◼ Input Voltage Range: 2.2 V to 6.5 V The TPL910 series products are 1-A high-current, 24-μVRMS ◼ Output Voltage Options: low-noise, high-PSRR, high-accuracy linear regulators with only ◼ ◆ Fixed Output Voltage: 0.8 V to 5 V 500-mV maximum ultra-low dropout voltage at 1-A load current. ◆ Adjustable Output Voltage: 0.8 V to 5.2 V The TPL910 series products support both fixed output voltage 3% Accuracy over Line Regulation, Load Regulation, and ranges from 0.8 V to 5 V and adjustable output voltage ranges Operating Temperature Range from 0.8 V to 5.2 V with external resistor divider. ◼ 1 A Maximum Output Current ◼ Low Dropout Voltage: 500 mV Maximum at 1 A Ultra-low noise, high PSRR, and high output current capability ◼ High PSRR: makes the TPL910 series products ideal power supply for noise- ◆ 65 dB at 1 kHz sensitive applications, such as high-speed communication ◆ 50 dB at 100 kHz facilities, test and measurement devices, or high-definition ◼ 24 μVRMS Output Voltage Noise (100 Hz to 100kHz) imaging equipment. Accurate output voltage tolerance, output ◼ Excellent Transient Response remote sensing, excellent transient response, and adjustable ◼ Stable with a 10 μF or Larger Ceramic Output Capacitor soft-start control ensures the TPL910 series products optimal ◼ Thermal Shutdown and Over-Current Protection power supply for the large-scale processors or digital loads, ◼ Operating Junction Temperature: –40°C to +125°C such as ASIC, FPGA, CPLD and DSP. ◼ Package: 3×3 DFN-8 The TPL910 series products provide 3×3 DFN-8 package with Applications guaranteed operating junction temperature range (T J) from – ◼ Wireless Communication: CPU, ASIC, FPGA, CPLD, DSP ◼ High-Performance Analog: ADC, DAC, LVDS, VCO ◼ Noise-Sensitive Imaging: CMOS Sensors, Video ASICs 40°C to +125°C. Typical Application Schematic CIN VIN VIN Digital I/O or VIN EN VOUT VOUT R1 TPL910 CFF COUT FB R2 NR CNR www.3peakic.com.cn GND 1 / 17 Rev.A.1  PDF

Документация на серию TPL910 

TPL910, 1-A Output, High-PSRR, Low-Noise LDO Regulator

Дата модификации: 13.06.2022

Размер: 690.5 Кб

17 стр.

• найти TPL910.pdf

Товары серии TPL910