Серия логических ИС SN74LVC2G17

UMW

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 Раздел Логическая ИС
Тип логики
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Диапазон напряжений питания
Задержка прохождения сигнала вход-выход
Рабочая температура

Документация на серию SN74LVC2G17

UMW R General Description The SN74LVC2G17 is a high performan ce dual buffer operating from a 1.65 to 5.5V supply. At VCC = 3.0V,high impedan ce TTL compatible inputs significantly reduce current loading to input drivers while the TTL compatible outputs offer improved switching noise performance. SN74LVC2G17 Features ● ● ● ● Extremely High Speed: t PD 2.0ns (typical) at VCC= 5.0V Designed for 1.65V to 5.5V VCC Operation Overvoltage Tolerant Inputs LVTTL Compatible − Interface Capability with 5.0V TTL Logic with VCC = 3.0V (2.7−3.3) ● LVCMOS Compatible ● 24mA Balanced Output Sink and Source Capability at VCC = 3.0V ● Near Zero Static Supply Current Substantially Reduces System Power Requirements ● Chip Complexity: FET = 72; Equivalent Gate = 18 ● These Devices are Pb−Free and are RoHS Compliant ● NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable Pin Configuration www.umw-ic.com 1 UTD Semiconductor Co.,Limited PDF
Документация на серию SN74LVC2G17 

UMW SN74LVC2G17

Дата модификации: 21.07.2023

Размер: 1.07 Мб

9 стр.

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