BL24C04A-PARC

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, в корпусе SOP8L
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BL24C02A/04A/08A/16A Features   Compatible with all I2C bidirectional data – Page Write within 3 ms transfer protocol – Partial Page Writes Allowed Memory array: – 2K bits (256X 8) / 4K bits (512 X 8) / 8K  Write Protect Pin for Hardware Data Protection  Schmitt Trigger, Filtered Inputs for Noise bits (1024 X 8) / 16K bits (2048 X 8) of Suppression EEPROM –   Page size: 16 bytes Single supply voltage and high speed: – 1 MHz  Random and sequential Read modes  – Endurance: 1 Million Write Cycles – Data Retention: 100 Years Enhanced ESD/Latch-up protection – Write: – High-reliability  HBM 8000V 8-lead PDIP/SOP/TSSOP and UDFN packages Byte Write within 3 ms Description  The BL24C02A/BL24C04A/BL24C08A/BL24C16A  The device is optimized for use in many provides 2048/4096/8192/16384 bits of serial industrial and commercial applications where electrically erasable and programmable read- low-power only memory (EEPROM), organized as essential. and low-voltage operation are 256/512/1024/2048 words of 8 bits each. Pin Configuration ８-lead PDIP ８-lead SOP ８-lead TSSOP ８-pad DFN NC １ 8 VCC NC １ 8 VCC NC １ 8 VCC VCC 8 1 NC NC ２ 7 WP NC ２ 7 WP NC ２ 7 WP WP 7 2 NC NC ３ 6 SCL NC ３ 6 SCL NC ３ 6 SCL SCL 6 3 NC GND ４ 5 SDA GND ４ 5 SDA GND ４ 5 SDA SDA 5 4 GND Bottem view BL24C02A/04A/08A/16A Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2016 Belling All Rights Reserved www.belling.com.cn 1-16 PDF
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Дата модификации: 18.01.2017

Размер: 489.5 Кб

16 стр.

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    24AA02E48-I/SN (MCRCH)