CJ74HC573AGN

JSCJ
JIANGSU CHANGJING ELECTRONICS TECHNOLOGY CO., LTD. Octal D-type Transparent Latch; 3-state CJ74HC/HCT573 Logic 1 Introduction 3 Features The CJ74HC/HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch • enable (LE) and output enable (/OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this Input levels: For CJ74HC573: CMOS level...
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Технические характеристики

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Корпус SOP-20
Тип логики octal transparent D-type latches
Кол-во узлов
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Аналоги 3

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Тип Наименование Корпус Упаковка i Тип Узлов Функция U пит Uпит(ном) Задержка Гистерезис Iвых Iвх Особенности Примечание T раб Карточка
товара
P= 74HC573M/TR (HGSEMI)
 
SO-20 SOIC20 в ленте 2000 шт
 
 octal transparent D-type latches — — — — — 8-bit D-type latch with 3-state control
P= U74HC573G-S20-R (UTC)
 
SO-20 SOIC20 в ленте 2500 шт octal transparent D-type latches — — — — — — OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
P= RS573XS20 (RUNIC)
 
SOP-20
 
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Файлы 1

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JIANGSU CHANGJING ELECTRONICS TECHNOLOGY CO., LTD. Octal D-type Transparent Latch; 3-state CJ74HC/HCT573 Logic 1 Introduction 3 Features The CJ74HC/HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch • enable (LE) and output enable (/OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this Input levels: For CJ74HC573: CMOS level For CJ74HCT573: TTL level • condition the latches are transparent, a latch output will change each time its corresponding D-input changes. Inputs and outputs on opposite sides of package allowing easy interface with microprocessors • Useful as input or output port for microprocessors and microcomputers was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on /OE causes • 3-state non-inverting outputs for bus-oriented the outputs to assume a high-impedance OFF-state. Operation of the /OE input does not affect the state of • Common 3-state output enable input • Specified from -40°C to +125°C When LE is LOW the latches store the information that applications the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to 4 Applications voltages in excess of VCC. 2 Available Packages PART NUMBER • Buffer Registers • Bidirectional Bus Drivers • Working Registers PACKAGE SOP20 CJ74HC573 TSSOP20 SOP20 CJ74HCT573 TSSOP20 Note: For all available packages, please refer to the part Orderable Information. OE 1 11 LE D0 2 C1 1D 19 Q0 Logic diagram www.jscj-elec.com 1 Rev. – 1.0 PDF
Документация на CJ74HC573AGN 

Дата модификации: 14.11.2025

Размер: 274.8 Кб

21 стр.

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