CJ74HC74BDN

JSCJ
JIANGSU CHANGJING ELECTRONICS TECHNOLOGY CO., LTD. Dual D-type Flip-flop with Set and Reset; Positive-edge Trigger CJ74HC/HCT74 Logic 1 Introduction 3 Features The CJ74HC/HCT74 are dual positive edge triggered D- • Input levels: - For CJ74HC74: CMOS level type flip-flop. They have individual data (nD), clock (nCP), set (n/SD) and reset (n/RD) inputs, and - For CJ74HCT74: TTL level co...
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Корпус TSSOP-14
Тип логики
Кол-во узлов
Логическая функция Dual D-type Flip-flop with Set and Reset; Positive-edge Trigger
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JIANGSU CHANGJING ELECTRONICS TECHNOLOGY CO., LTD. Dual D-type Flip-flop with Set and Reset; Positive-edge Trigger CJ74HC/HCT74 Logic 1 Introduction 3 Features The CJ74HC/HCT74 are dual positive edge triggered D- • Input levels: - For CJ74HC74: CMOS level type flip-flop. They have individual data (nD), clock (nCP), set (n/SD) and reset (n/RD) inputs, and - For CJ74HCT74: TTL level complementary nQ and n/Q outputs. Data at the nD- • Symmetrical output impedance input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, is stored in the • Low power dissipation • Balanced propagation delays flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant • Specified from -40°C to +125°C to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors 4 Applications to interface inputs to voltages in excess of VCC. • Convert a momentary switch to a toggle switch • Divide a clock signal by 2 or 4 2 Available Packages PART NUMBER PACKAGE SOP14 CJ74HC74 TSSOP14 SOP14 CJ74HCT74 TSSOP14 Note: For all available packages, please refer to the part Orderable Information. 4 1SD 10 2SD SD 2 3 1D D SD Q 1Q 5 1CP CP 12 11 2D Q 2Q Q 2Q 9 2CP CP FF FF Q 1Q 6 RD 1 D 8 RD 1RD 13 2RD Functional diagram www.jscj-elec.com 1 Rev. – 1.1 PDF
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Дата модификации: 14.11.2025

Размер: 241.8 Кб

18 стр.

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