CJ74LVC4T245BEN

JSCJ
JIANGSU CHANGJING ELECTRONICS TECHNOLOGY CO., LTD. 4-bit Dual Supply Translating Transceiver; 3-state CJ74LVC/LVCH4T245 Logic 1 Introduction 3 Features The CJ74LVC/LVCH4T245 are 4-bit dual supply • translating transceivers with 3-state outputs that enable bidirectional level translation. The device can be used Wide supply voltage range: - VCC(A): 1.2V to 5.5V - VCC(B): 1.2V to 5.5V as...
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Корпус TSSOP-16
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JIANGSU CHANGJING ELECTRONICS TECHNOLOGY CO., LTD. 4-bit Dual Supply Translating Transceiver; 3-state CJ74LVC/LVCH4T245 Logic 1 Introduction 3 Features The CJ74LVC/LVCH4T245 are 4-bit dual supply • translating transceivers with 3-state outputs that enable bidirectional level translation. The device can be used Wide supply voltage range: - VCC(A): 1.2V to 5.5V - VCC(B): 1.2V to 5.5V as two 2-bit transceivers or as a 4-bit transceiver. It features four 2-bit input-output ports (nAn and nBn), a • Suspend mode • ±24mA output drive (VCC=3.0V) direction control input (nDIR), a output enable input (/nOE) and dual supply pins (VCC(A) and VCC(B)).Both • Inputs accept voltages up to 5.5V • Low power consumption: 30uA maximum ICC VCC(A) and VCC(B) can be supplied at any voltage • between 1.2V and 5.5V making the device suitable for translating between any of the low voltage nodes (1.2V, IOFF circuitry provides partial Power-down mode operation • Specified from -40°C to +125°C 1.5V, 1.8V, 2.5V, 3.3V and 5.0V). Pins nAn, /nOE and nDIR are referenced to VCC(A) and pins nBn are 4 Applications referenced to VCC(B). A HIGH on nDIR allows transmission from nAn to nBn and a LOW on nDIR • Enterprise and communications allows transmission from nBn to nAn. The output enable • Industrial input (/nOE) can be used to disable the outputs so the buses are effectively isolated. • Personal electronics • Wireless infrastructure The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the • Building automation • Point of sale output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn port and nBn port are in the high-impedance OFFstate. DIR Active bus hold circuitry in the CJ74LVCH4T245 holds unused or floating data inputs at a valid logic level. A1 OE B1 A2 2 Available Packages B2 VCC(A) PART NUMBER CJ74LVC4T245 CJ74LVCH4T245 VCC(B) PACKAGE SOP16 Logic diagram TSSOP16 SOP16 TSSOP16 Note: For all available packages, please refer to the part Orderable Information. www.jscj-elec.com 1 Rev. – 1.0 PDF
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Дата модификации: 14.11.2025

Размер: 1008.2 Кб

29 стр.

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