NCA9617-DMSR

Novosense
NCA9617 Level translating Fm+ I2C-bus repeater Datasheet (EN) 1.2 Product Overview  Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II The NCA9617 is a BiCMOS dual bidirectional buffer intended for I2C bus and SMBus systems. It can provide bidirectional voltage-level translation (up-translation and down-translation) between low voltages (down to 0.8 V) and higher voltages (2.2V-5.5V)...
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Технические характеристики

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Корпус uSOP-8 MSOP8
Входной интерфейс
Выходной интерфейс
Примечание
Диапазон рабочих температур
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NCA9617 Level translating Fm+ I2C-bus repeater Datasheet (EN) 1.2 Product Overview  Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II The NCA9617 is a BiCMOS dual bidirectional buffer intended for I2C bus and SMBus systems. It can provide bidirectional voltage-level translation (up-translation and down-translation) between low voltages (down to 0.8 V) and higher voltages (2.2V-5.5V) in mixed-mode applications. This device enables I2C and similar bus systems to be extended, without degradation of performance even during level shifting. The NCA9617 buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, allowing two buses of 550-pF or greater bus capacitance to be connected in an I2C application. This device can also be used to isolate two halves of a bus for voltage and capacitance.  ESD Protection Exceeds JESD 22 Key Features Device Information  Two-Channel Bidirectional I2C Buffer – 5500-V Human-Body Model (A114-A) – 1500-V Charged-Device Model (C101) Applications  Servers  Routers (Telecom Switching Equipment)  Industrial Equipment  Products With Many I2C Slaves and/or Long PCB Part Number NCA9617-DMSR Package MSOP8 Body Size 3.00mm*3.00mm  Support for Standard Mode, Fast Mode (400 kHz), and Fast Mode+ (1 MHz) I2C Operation  Operating Supply Voltage Range of 0.8 V to 5.5 V on A-Side Functional Block Diagrams  Operating Supply Voltage Range of 2.2 V to 5.5 V on B-Side  Voltage-Level Translation From 0.8 V to 5.5 V and 2.2 V to 5.5 V  Active-High Repeater-Enable Input  Open-Drain I2C I/O  5.5-V Tolerant I2C and Enable Input Support VCCA 1 SCLA 2 SDAA 3 GND 4 8 VCCB NCA9617 7 SCLB 6 SDAB 5 EN Figure 1. NCA9617 Block Diagram  Mixed-Mode Signal Operation  Lockup-Free Operation  Support for Clock Stretching and Multiple Master  Arbitration Across The Device Copyright © 2019, NOVOSENSE Page 1 PDF
Документация на NCA9617-DMSR 

Дата модификации: 05.05.2022

Размер: 905 Кб

17 стр.

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