RS1472XTQC16

Runic
RS1472 14-Bit, 2 MSPS, Dual-Channel, Differential Analog-to-Digital Converters 1 FEATURES 3 DESCRIPTIONS • Sample Rate: 2 MSPS The RS1472 is a 14-bit, 2MSPS analog-to-digital • INL 2.5 LSB (max) converter (ADC) that offers differential inputs. The • Wide Supply Range: device operates at a 2MSPS sample rate with a standard Analog: 2.7 V to 5.25 V 16 clock data frame. The device incl...
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RS1472 14-Bit, 2 MSPS, Dual-Channel, Differential Analog-to-Digital Converters 1 FEATURES 3 DESCRIPTIONS • Sample Rate: 2 MSPS The RS1472 is a 14-bit, 2MSPS analog-to-digital • INL 2.5 LSB (max) converter (ADC) that offers differential inputs. The • Wide Supply Range: device operates at a 2MSPS sample rate with a standard Analog: 2.7 V to 5.25 V 16 clock data frame. The device includes a two-channel Digital: 1.65 V to AVDD input multiplexer and a low-power successive • 14-Bit No Missing Code Resolution approximation register (SAR) ADC with an inherent • Auto Power-Down at Lower Speeds sample-and-hold (S/H) input stage. • Two Differential Inputs • Operating Temperature Range -40 °C to The RS1472 supports a wide analog supply range that 125 °C allows the full-scale input range to extend to ±5Vpp. A • SPI-Compatible Interface simple SPI, with a digital supply that can operate as low • Package: QFN3x3-16 as 1.65 V, allows for easy interfacing to a wide variety of digital controllers. Automatic power-down can be enabled 2 APPLICATIONS when operating at slower speeds to dramatically reduce power consumption. • Optical networking • Sensors Measurements • Portable Instrumentation The RS1472 is offered in a leadless QFN3x3-16 package • Medical Instrumentation and is specified over a temperature range of -40°C to • Data Acquisition Systems +125°C. • Battery-Powered Equipment Device Information (1) PART NUMBER RS1472 PACKAGE QFN3x3-16 BODY SIZE(NOM) 3.00mm x 3.00mm (1) For all available packages, see the orderable addendum at the end of the data sheet. AVDD REF REF GND DVD D RS1472 AIN0P AIN0N MUX SAR ADC S/H PDEN CS SPI SCLK AIN1N SDO AIN1P CH_SEL GND Figure 1. Block Diagram REV A.1 1 / 28 www.run-ic.com PDF
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Дата модификации: 01.02.2024

Размер: 1.37 Мб

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