SIT1021QTK

Sit Elec
芯力特 SIT1021Q Local Interconnect Network (LIN) transceiver PRODUCT APPEARANCE FEATURES ➢ LIN 2.x/ISO 17987-4:2016 (12V)/SAE J2602 compliant ➢ Thermally protected ➢ AEC-Q100 qualified ➢ Transmit data (TXD) dominant time-out function ➢ Bus terminal current limit protected ➢ Under voltage on battery ➢ Very low current consumption in Sleep mode ➢ Support local and remote wake-up...
развернуть ▼ свернуть ▲
 

Технические характеристики

показать свернуть
Корпус DFN83X3
Нашли ошибку? Выделите её курсором и нажмите CTRL + ENTER

Файлы 1

показать свернуть
芯力特 SIT1021Q Local Interconnect Network (LIN) transceiver PRODUCT APPEARANCE FEATURES ➢ LIN 2.x/ISO 17987-4:2016 (12V)/SAE J2602 compliant ➢ Thermally protected ➢ AEC-Q100 qualified ➢ Transmit data (TXD) dominant time-out function ➢ Bus terminal current limit protected ➢ Under voltage on battery ➢ Very low current consumption in Sleep mode ➢ Support local and remote wake-up ➢ Enable an external high voltage regulator by INH ➢ Baud rates up to 20 kBd ➢ Very low ElectroMagnetic Emission (EME) ➢ High ElectroMagnetic Immunity (EMI) ➢ Available in SOP8 and DFN3*3-8/HVSON8 packages Fig 1. Provide green and environmentally friendly lead-free package DESCRIPTION The SIT1021Q is a physical layer transceiver of Local Interconnect Network (LIN). It is compliant with LIN 2.0/LIN 2.1/LIN 2.2/LIN 2.2A/ISO 17987-4:2016 (12V) and SAE J2602 standards. It is typically used for low speed in-vehicle networks using baud rates from 1 kBd to 20 kBd. The LIN protocol data stream at the transmit data input (TXD) is converted by the SIT1021Q into a bus signal with optimized wave shaping to minimize ElectroMagnetic Emission (EME). The SIT1021Q converts the data stream on LIN bus to logic level signals that are sent to the microprocessor via the pin RXD. The LIN bus is pulled high by the internal slave resistor and a series diode. Master applications require an external pull-up resistor in series with a diode to connect pin VBAT and pin LIN. The SIT1021Q has an extremely low current consumption in sleep mode. The power consumption is reduced to a minimum if in failure modes. It also provides a high voltage output pin INH to enable an external high voltage regulator which is used to support the microprocessor. REC V1.1 September 2022 1 / 22 www.sitcores.com PDF
Документация на серию SIT1021Q 

Дата модификации: 22.09.2022

Размер: 724 Кб

22 стр.

    Внимание! Точность указанного на сайте описания товара не может быть гарантирована. Для получения более полной и точной информации о товаре смотрите техническое описание (Datasheet) на сайте производителя.

    CA-IF1021S-Q1 (CHIPANLG)