SIT1021TK

Sit Elec
SIT1021 Local Interconnect Network (LIN) transceiver 芯力特 OUTLINE FEATURES  LIN 2.x/ISO 17987-4:2016 (12V)/SAE J2602 compliant  Thermally protected  Transmit data (TXD) dominant time-out function  Bus terminal current limit protected  Under voltage on battery  Very low current consumption in Sleep mode  Support local and remote wake-up  Enable an external high voltag...
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SIT1021 Local Interconnect Network (LIN) transceiver 芯力特 OUTLINE FEATURES  LIN 2.x/ISO 17987-4:2016 (12V)/SAE J2602 compliant  Thermally protected  Transmit data (TXD) dominant time-out function  Bus terminal current limit protected  Under voltage on battery  Very low current consumption in Sleep mode  Support local and remote wake-up  Enable an external high voltage regulator by INH  Baud rate up to 20 kBd  Very low ElectroMagnetic Emission (EME)  High ElectroMagnetic Immunity (EMI)  Available in SO8 and HVSON8 packages Fig 1. Provide green and environmentally friendly lead-free package DESCRIPTION The SIT1021 is a physical layer transceiver of Local Interconnect Network (LIN). It is compliant with LIN2.0/LIN2.1/LIN2.2/LIN2.2A/ISO 17987-4:2016 (12V) and SAE J2602 standards. It is typically used for low speed in-vehicle networks using baud rates from 1 kBd to 20 kBd. The LIN protocol data stream at the transmit data input (TXD) is converted by the SIT1021 into a bus signal with optimized wave shaping to minimize ElectroMagnetic Emission (EME). The SIT1021 converts the data stream on LIN bus to logic level signals that are sent to the microprocessor via the pin RXD. The LIN bus is pulled high by the internal slave resistor and a series diode. Master applications require an external pull-up resistor in series with a diode to connect pin VBAT and pin LIN. The SIT1021 has an extremely low current consumption in sleep mode. The power consumption is reduced to a minimum if in failure modes. It is also provide a high voltage output pin INH to enable an external high voltage regulator which used to support the microprocessor. PIN CONFIGURATION RXD 1 SLP_N 2 8 INH 7 VBAT SIT1021 WAKE_N 3 6 LIN TXD 4 5 GND Fig 2. REC V1.2 2021.05 SIT1021 pin configuration diagrams 1 / 17 www.sitcores.com PDF
Документация на серию SIT1021 

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Дата модификации: 21.05.2021

Размер: 1.91 Мб

17 стр.

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