XL9555QF24

Xinluda
XL9535, XL9555 Product datasheet XL9535, XL9555 16-bit I2C-bus and SMBus I/O port Expander With Interrupt Output and Configuration Registers Rev. 2.3 — 2018 1. DESCRIPTION This device (XL9535/XL9555) is a 24-pin CMOS IC that provides 16-bit of General Purpose parallel Input/Output (GPIO) expansion for most micro-controller families via the I 2C-bus/SMBus interface [serial clock line (SCL), se...
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Технические характеристики

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Корпус QFN-24
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Аналоги 1

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Тип Наименование Корпус Упаковка i Вход Выходов Iout.max Uout.max Логика Задержка Примечание T раб Карточка
товара
P- TPT29555-QF8R (3PEAK)
 
— в ленте 10 шт
 
 — — — — I2C to 16 bit GPIO, reserved 0X0C registers

Файлы 1

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XL9535, XL9555 Product datasheet XL9535, XL9555 16-bit I2C-bus and SMBus I/O port Expander With Interrupt Output and Configuration Registers Rev. 2.3 — 2018 1. DESCRIPTION This device (XL9535/XL9555) is a 24-pin CMOS IC that provides 16-bit of General Purpose parallel Input/Output (GPIO) expansion for most micro-controller families via the I 2C-bus/SMBus interface [serial clock line (SCL), serial data line (SDA)]. These device is designed for 2.3-V to 5.5-V VCC operation. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc. These device consists of two 8-bit Configuration (Input or Output selection); Input Port, Output Port and Polarity Inversion (active-HIGH or active-LOW operation) registers. At power on, the I/Os are configured as inputs. The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master. These device open-drain interrupt (INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. The system master can reset these device in the event of a timeout or other improper operation by utilizing the power-on reset feature. The power-on reset sets the registers to their default values and initializes the I2C/SMBus state machine. Three hardware address pins (A0, A1 and A2) vary the fixed I2C-bus address and allow up to eight devices to share the same I2C-bus/SMBus. 2. FEATURES l l l l l l l l I2C-bus to 16-bit GPIO expander Operating power supply voltage range of 2.3-V to 5.5-V Low standby current consumption 5 V tolerant I/O ports 400 kHz fast-mode I2C-bus clock frequency Noise filter on SCL/SDA inputs Internal power-on reset No glitch on power-up www.xinluda.com l l l l l l 1 / 25 Polarity Inversion register Address by 3 hardware address pins for use of up to 8 devices Open-drain active LOW interrupt output 16 I/O pins which default to 16 inputs Latch-up testing exceeds 100 mA per JESD 78 ESD protection exceeds JESD 22 2000 V HBM, 200 V MM and 1000 V CDM Rev 2.3 PDF
Документация на серию XL9555 

XL9535, XL9555 Datasheet

Дата модификации: 14.10.2024

Размер: 581.5 Кб

25 стр.

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    TPT29555-TS5R (3PEAK)