Серия микросхем памяти P24C64C

Общие характеристики

	Раздел	Память
	Тип памяти
	Подтип памяти
	Интерфейс
	Объём памяти
	Организация памяти

Документация на серию P24C64C

P24C64C I2C-Compatible Serial E2PROM Data Sheet Rev. 1.2 General Description The P24C64C is a 64-Kbit I2C-compatible Serial EEPROM (Electrically Erasable Programmable Memory) device. It contains a memory array of 8K × 8 bits, which is organized in 32-byte per page. P24C64C provides the following devices for different application. Device Selection Table Device Name Voltage Range Temp. Range Max. Clock Frequency P24C64C-MI 1.7V~5.5V -40°C ~ 85°C 1MHz[1] P24C64C-NK 1.8V~5.5V -40°C~105°C 1MHz[1] P24C64C-DE 2.5V~5.5V -40°C~125°C 1MHz Note 1: 400 kHz for VCC < 2.5V. Features ◼ ◼ Single Supply Voltage and High Speed  Minimum operating voltage down to 1.7V  1 MHz clock from 2.5V to 5.5V  400kHz clock from 1.7V to 2.5V Low power CMOS technology  Read current 400uA, maximum  Write current 1.0mA, maximum ◼ Schmitt Trigger, Filtered Inputs for Noise Suppression ◼ Sequential & Random Read Features ◼ 32 byte Page Write Modes, Partial Page Writes Allowed ◼ ◼ ◼ Write protect of the whole memory array Additional Write Lockable Page Additional 128-bit Serial Number ◼ Self-timed Write Cycle (5ms maximum) ◼ High Reliability ◼  Endurance: 1 Million Write Cycles  Data Retention: 100 Years  HBM: 6KV  Latch up Capability: +/- 200mA (25°C & 125°C) Package: PDIP, SOP, TSSOP, DFN/UDFN and SOT23-5 1/21

Документация на серию P24C64C

Features

Дата модификации: 08.06.2022

Размер: 404.2 Кб

21 стр.

найти P24C64C.pdf

Товары серии P24C64C

Наименование	i	Упаковка	Корпус	Напряжение	T раб
P24C64C-DPH-MIT (PUYA)		в линейках 50 шт	DIP-8 PDIP8
P24C64C-SSH-MIR (PUYA)		в ленте 4000 шт	SOP-8
P24C64C-SSH-MIT (PUYA)			SOP-8
P24C64C-SSH-NKR (PUYA)		в ленте 4000 шт	SOP-8
P24C64C-TSH-MIR (PUYA)		в ленте 4000 шт	TSSOP-8
P24C64C-TSH-MIT (PUYA)			TSSOP-8
P24C64C-TSH-NKR (PUYA)			TSSOP-8
P24C64C-TSH-NKT (PUYA)			TSSOP-8
P24C64C-UNH-MIR (PUYA)			DFN-8 UDFN8