Серия микросхем памяти P24CM01B

PUYA

Общие характеристики

 Раздел Память
Тип памяти
Подтип памяти
Интерфейс
Объём памяти
Организация памяти

Документация на серию P24CM01B

P24CM01B I2C-Compatible Serial E2PROM Data Sheet Rev. 1.2 General Description 2 The P24CM01B is a 1024-Kbit I C-compatible Serial EEPROM (Electrically Erasable Programmable Memory) device. It contains a memory array of 128 K × 8 bits, which is organized in 256-byte per page. P24CM01B provides the following devices for different application. Device Selection Table Device Name Voltage Range Temp. Range Max. Clock Frequency P24CM01B -MI 1.7V~5.5V -40°C ~ 85°C 1MHz P24CM01B -NK 1.8V~5.5V -40°C~105°C 1MHz P24CM01B -DE 2.5V~5.5V -40°C~125°C [1] [1] 1MHz Note 1: 400 kHz for VCC < 2.5V. Features   Single Supply Voltage and High Speed  Minimum operating voltage down to 1.7V  1 MHz clock from 2.5V to 5.5V  400kHz clock from 1.7V to 2.5V Low power CMOS technology  Read current 500uA, maximum  Write current 2.5mA, maximum  Schmitt Trigger, Filtered Inputs for Noise Suppression  Sequential & Random Read Features  256 byte Page Write Modes, Partial Page Writes Allowed    Write protect of the whole memory array Additional Write Lockable Page Self-timed Write Cycle (5ms maximum)  High Reliability   Endurance: 1 Million Write Cycles  Data Retention: 100 Years  HBM: 6KV  Latch up Capability: +/- 200mA Package: PDIP, SOP, TSSOP, and DFN 1/19 PDF
Документация на серию P24CM01B 

Features

Дата модификации: 19.09.2022

Размер: 677.4 Кб

19 стр.

    Товары серии P24CM01B

    Наименование i Упаковка Корпус Напряжение T раб
    P24CM01B-SSH-MIR (PUYA)
     
     
    		 в ленте 4000 шт SOP-8
    P24CM01B-SSH-MIT (PUYA)
     
     
    		 SOP-8
    P24CM01B-TSH-MIR (PUYA)
     
     
    		 TSSOP-8
    P24CM01B-TSH-MIT (PUYA)
     
     
    		 TSSOP-8
    P24CM01B-TSH-NKT (PUYA)
     
     
    		 TSSOP-8