BL24C64A-PARC

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, в корпусе SOP-8
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  • Группа: Память  
  • Корпус: SOP-8
  • Норма упаковки: 2500  шт. (в ленте)

Технические характеристики

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Корпус SOP-8
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BL24C64A 64Kbits (8,192×8) Features    Compatible with all I2C bidirectional data Partial Page Writes Allowed – transfer protocol  Write Protect Pin for Hardware Data Protection Memory array:  Schmitt Trigger, Filtered Inputs for Noise – 64 Kbits (8 Kbytes) of EEPROM Suppression – Page size: 32 bytes – Additional Write lockable page  Single supply voltage and high speed: – 1 MHz   Random and sequential Read modes  Write: Byte Write within 3 ms – Page Write within 3 ms – Endurance: 1 Million Write Cycles – Data Retention: 100 Years Enhanced ESD/Latch-up protection HBM 8000V –  – High-reliability 8-lead PDIP/SOP/TSSOP/UDFN and WLCSP4 packages Description  The BL24C64A provides 65536 bits of serial low-power electrically erasable and programmable read- essential. only memory (EEPROM), organized as 8192   and low-voltage operation are The BL24C64A offers an additional page, words of 8 bits each. named the Identification Page (32 bytes). The The device is optimized for use in many Identification Page can be used to store industrial and commercial applications where sensitive application parameters which can be (later) permanently locked in Read-only mode. Pin Configuration 8-lead PDIP 8-lead SOP 8-lead TSSOP 8-pad DFN WLCSP4 1 A0 1 5 VCC A0 1 5 VCC A0 1 5 VCC VCC 1 5 A0 A1 2 6 WP A1 2 6 WP A1 2 6 WP WP 2 6 A1 A2 3 7 SCL A2 3 7 SCL A2 3 7 SCL SCL 3 7 A2 GND 4 8 SDA GND 4 8 SDA GND 4 8 SDA SDA 4 8 GND A Vcc Vss B SCL SDA Bottem view BL24C64A 64Kbits (8,192×8) Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2016 Belling All Rights Reserved www.belling.com.cn 2 Marking side (top view) 1-17 PDF
Документация на BL24C64A-PARC 

DESCRIPTION

Дата модификации: 22.11.2016

Размер: 581.5 Кб

17 стр.

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    24AA02E48-I/SN (MCRCH)